專利名稱 | 互補能量路徑絕熱邏輯Complementary Energy Path AdiabaticLogic |
申請日 (校編號) | 2008/09/24 (097038US) |
專利證書號 | 7,746,117 美國 |
專利權人 | 國立中央大學 |
發明人 | 薛木添、龔存雄、洪棨桐、姚凱文、蘇純賢 |
技術摘要: | ||||||||
A complementary energy path adiabatic logic (CEPAL) includes an evaluation network and a power clock network. The evaluation network is a logic circuit composed of P-type MOS transistors and N-type MOS transistors. The power clock network includes a P-type and N-type MOS transistors and additional P-type and N-type MOS transistors, with each of the transistors involved in the power clock network acting as an active diode. |
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IPC: | ||||||||
HO3K 19/096 |
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